1. Field of the Invention
The present invention pertains to a duty cycle circuit, most particularly, to a duty cycle correction method and its implementing circuit which uses a relative phase detector in order to detect duty cycle errors, uses charge pumps in order to accumulate the errors and uses controllable delay units in order to adjust the duty ratio.
2. Description of Related Arts
It is very significant to adjust the duty cycle of a half-rate transmission clock. Generally, the conventional duty cycle circuit is implemented by adjusting the reverse threshold of the clock inverter or buffer. By increasing or decreasing the threshold, the pulse width of the high-level and low-level of an input clock can be changed and the duty ratio gets adjusted. The adjusting range is limited to the transition time of the clock, which is always short to reduce the signal interference (SI) effect.
As for a detecting method, the conventional way is to compare the DC levels of differential signals. However, the accuracy is easy to be influenced due to the DC offset of a comparator.